26.6 Register Summary

Refer to the Registers Description section for more details on register properties and access permissions.

OffsetNameBit Pos.76543210
0x00CTRLA15:8CMDEX[7:0]
7:0 CMD[6:0]

0x02

...

0x03

Reserved         
0x04CTRLB31:24        
23:16    CACHEDIS[1:0]READMODE[1:0]
15:8      SLEEPPRM[1:0]
7:0MANW  RWS[3:0] 
0x08PARAM31:24DFP[11:4]
23:16DFP[3:0] PSZ[2:0]
15:8NVMP[15:8]
7:0NVMP[7:0]
0x0CINTENCLR31:24       FLTCAP
23:16        
15:8      DERRSERR
7:0      ERRORREADY
0x10INTENSET31:24       FLTCAP
23:16        
15:8      DERRSERR
7:0      ERRORREADY
0x14INTFLAG31:24       FLTCAP
23:16        
15:8    FLASHERR DERRSERR
7:0      ERRORREADY
0x18STATUS15:8       SB
7:0   NVMELOCKEPROGELOADPRM

0x1A

...

0x1B

Reserved         
0x1CADDR31:24        
23:16  ADDR[21:16]
15:8ADDR[15:8]
7:0ADDR[7:0]
0x20LOCK15:8LOCK[15:8]
7:0LOCK[7:0]

0x22

...

0x27

Reserved         
0x28PBLDATA031:24PBLDATA[31:24]
23:16PBLDATA[23:16]
15:8PBLDATA[15:8]
7:0PBLDATA[7:0]
0x2CPBLDATA131:24PBLDATA[31:24]
23:16PBLDATA[23:16]
15:8PBLDATA[15:8]
7:0PBLDATA[7:0]

0x30

...

0x7F

Reserved         
0x80ECCCTRL31:24        
23:16        
15:8SECCNT[7:0]
7:0      ECCDFDISECCDIS
0x84FLTCTRL31:24        
23:16        
15:8 FLTMD[2:0]    
7:0      FLTENFLTRST
0x88FFLTPTR31:24        
23:16FLT2PTR[7:0]
15:8        
7:0FLT1PTR[7:0]
0x8CFFLTADR31:24        
23:16FLTADR[23:16]
15:8FLTADR[15:8]
7:0FLTADR[7:0]
0x90FFLTCAP31:24        
23:16FLTADR[23:16]
15:8FLTADR[15:8]
7:0FLTADR[7:0]
0x94FFLTPAR31:24        
23:16SECOUT[7:0]
15:8        
7:0SECIN[7:0]
0x98FFLTSYN31:24        
23:16      DERRSERR[1:0]
15:8        
7:0SECSYN[7:0]
0x9CDBGCTRL31:24        
23:16        
15:8        
7:0     DBGECC[1:0]