Note: This Register is only available on PIC32CM5164 and PIC32CM2532 variants.
Note: When FLTCTRL.FLTEN = 1, this register becomes write protected: writes will return
a bus error.
Name:
FFLTPTR
Offset:
0x88
Reset:
0x00000000
Property:
PAC Write-Protection,
Enable-Protected
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
FLT2PTR[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
FLT1PTR[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 23:16 – FLT2PTR[7:0] FLT2PTR ECC Fault Injection Bit Position
Pointer (for double bit error). Refer to the following table.
Table 26-7. FLTxPTR Values
FFLTPTR.FLTxPTR Value
DATA BITS [0:63]
ECC Parity BITS [0:7]
0x0
--
0
0x1
--
1
0x2
--
2
0x3
0
--
0x4
--
3
0x5 to 0x7
1 to 3
--
0x8
--
4
0x9 to 0xF
4 to 10
--
0x10
--
5
0x11 to 0x1F
11 to 25
--
0x20
--
6
0x21 to 0x3F
26 to 56
--
0x40
--
7
0x41 to 0x47
57 to 63
--
0x48 to 0xFF
--
--
Bits 7:0 – FLT1PTR[7:0] ECC Fault Injection
Bit Position Pointer (for double bit error). Refer to the following
table.
Table 26-6. FLTxPTR Values
FFLTPTR.FLTxPTR Value
DATA BITS [0:63]
ECC Parity BITS [0:7]
0x0
--
0
0x1
--
1
0x2
--
2
0x3
0
--
0x4
--
3
0x5 to 0x7
1 to 3
--
0x8
--
4
0x9 to 0xF
4 to 10
--
0x10
--
5
0x11 to 0x1F
11 to 25
--
0x20
--
6
0x21 to 0x3F
26 to 56
--
0x40
--
7
0x41 to 0x47
57 to 63
--
0x48 to 0xFF
--
--
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
