26.6.18 ECC Syndrome
Note: This Register is only available on PIC32CM5164 and PIC32CM2532 variants.
| Name: | FFLTSYN |
| Offset: | 0x98 |
| Reset: | 0x00000000 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| DERRSERR[1:0] | |||||||||
| Access | R | R | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SECSYN[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 17:16 – DERRSERR[1:0] Double Error detected, Single Error Corrected
| Value | Description |
|---|---|
| 0x0 | No errors found |
| 0x1 | A single error has been found and corrected |
| 0x2 | A double error has been detected |
| 0x3 | A double error has been detected |
Bits 7:0 – SECSYN[7:0] Single Error Syndrome
Indicates the value of the SEC syndrome from the previous address match.