19.1.1 PMP Control Register


Bit	15	14	13	12	11	10	9	8
	ON		SIDL	ADRMUX[1:0]		PMPTTL	PTWREN	PTRDEN
Access	R/W		R/W	R/W	R/W	R/W	R/W	R/W
Reset	0		0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CSF[1:0]		ALP	CS2P	CS1P		WRSP	RDSP
Access	R/W	R/W	R/W	R/W	R/W		R/W	R/W
Reset	0	0	0	0	0		0	0

Bit 15 – ON PMP Enable bit

Value	Description
`1`	PMP is enabled
`0`	PMP is disabled, no off-chip access is performed

Bit 13 – SIDL PMP Stop in Idle Mode bit

Value	Description
`1`	Discontinues module operation when device enters Idle mode
`0`	Continues module operation when device enters Idle mode

Bits 12:11 – ADRMUX[1:0] Address/Data Multiplexing Selection bits

Value	Description
`11`	All 16 bits of address are multiplexed with the 16 bits of data (PMPA[15:0]/PMPD[15:0]) using two phases
`10`	All 16 bits of address are multiplexed with the lower 8 bits of data (PMPA[15:8]/PMPA[7:0]/ PMPD[7:0]) using three phases
`01`	Lower 8 bits of address are multiplexed with the lower 8 bits of data (PMPA[7:0]/PMPD[7:0])
`00`	Address and data appear on separate pins

Bit 10 – PMPTTL PMP Module TTL Input Buffer Select bit

Value	Description
`1`	PMP module uses TTL input buffers
`0`	PMP module uses Schmitt Trigger input buffers

Bit 9 – PTWREN PMP Write Strobe Port Enable bit

Value	Description
`1`	PMWR/PMENB port is enabled
`0`	PMWR/PMENB port is disabled

Bit 8 – PTRDEN PMP Read/Write Strobe Port Enable bit

Value	Description
`1`	PMRD/PMWR port is enabled
`0`	PMRD/PMWR port is disabled

Bits 7:6 – CSF[1:0] Chip Select Function bits⁽¹⁾

Value	Description
`11`	Reserved
`10`	PMCS2 and PMCS1 function as Chip Select
`01`	PMCS2 functions as Chip Select, PMCS1 functions as address bit
`00`	PMCS2 and PMCS1 function as address bits

Bit 5 – ALP Address Latch Polarity bit⁽¹⁾

Value	Description
`1`	Active-high (PMALL and PMALH)
`0`	Active-low (PMALL and PMALH)

Bit 4 – CS2P Chip Select 2 Polarity bit⁽¹⁾

Value	Description
`1`	Active-high
`0`	Active-low

Bit 3 – CS1P Chip Select 1 Polarity bit⁽¹⁾

Value	Description
`1`	Active-high
`0`	Active-low

Bit 1 – WRSP Write Strobe Polarity bit

For Client Modes and Host Mode 2 (MODE[1:0] (PMMODE[9:8]) = 00, 01, 10):

1 = Write strobe is active-high (PMWR)

0 = Write strobe is active-low (PMWR)

For Host Mode 1 (MODE[1:0] (PMMODE[9:8]) = 11):

1 = Enables strobe active-high (PMENB)

0 = Enables strobe active-low (PMENB)

Value	Description
`1`	PMRD/PMWR port is enabled
`0`	PMRD/PMWR port is disabled

Bit 0 – RDSP Read Strobe Polarity bit

For Client Modes and Host Mode 2 (MODE[1:0] (PMMODE[9:8]) = 00, 01, 10):

1 = Read strobe is active-high (PMRD)

0 = Read strobe is active-low (PMRD)