24.5.1 Control A
| Name: | CTRLA |
| Offset: | 0x00 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PGM | INMX[2:0] | DTI3EN | DTI2EN | DTI1EN | DTI0EN | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – PGM Pattern Generation Mode
1’ enables the Pattern Generation mode. In Pattern Generation mode, the
dead-time buffer registers are used for storing the pattern. These buffers are not available
in this mode.Bits 6:4 – INMX[2:0] Input Matrix
This bit field defines the matrix routing of the timer/counters Waveform Generation inputs to the WEX internal module. Refer to table Table 24-1 for more information.
| Value | Name | Description |
|---|---|---|
| 0x0 | DIRECT | Direct from TCE0 |
| 0x1 | - | Reserved |
| 0x2 | CWCMA | Common Waveform Channel Mode A. Waveform output (WO) on a single Pulse-Width Modulation (PWM) channel. |
| 0x3 | CWCMB | Common Waveform Channel Mode B. WO on two PWM channels. |
Bits 0, 1, 2, 3 – DTIEN Dead-Time Insertion CMPn Enable
| Value | Name | Description |
|---|---|---|
| 0x0 | DISABLED | Dead-time not inserted |
| 0x1 | ENABLED | Dead-time inserted |