8.6 Input Mapping

The inputs of the Peripheral Pin Select options are mapped based on the peripheral. That is, a control register associated with a peripheral dictates the pin it will be mapped to. The RPINRx registers are used to configure peripheral input mapping. Each register contains sets of 8-bit fields, with each set associated with one of the remappable peripherals. Programming a given peripheral’s bit field with an appropriate 8-bit index value maps the RPn pin with the corresponding value, or internal signal, to that peripheral. See Table 8-3 for a list of available inputs.

For example, Figure 8-2 illustrates remappable pin selection for the U1RX input.
Figure 8-2. Remappable Input for U1RX

Configuring UART1 Input and Output Functions provides a configuration for bidirectional communication with flow control using UART1. The following input and output functions are used:

  • Input Functions: U1RX, U1CTS
  • Output Functions: U1TX, U1RTS
Table 8-3. Remappable Pin Inputs
RPINRx ValuedsPIC33CK256/128:FunctiondsPIC33CK256/128:Available PortsdsPIC33CK64/32:FunctiondsPIC33CK64/32:Available Ports
0VSS​ InternalVSS​ Internal
1Comparator 1InternalComparator 1Internal
2ReservedReservedReservedReserved
3ReservedReservedReservedReserved
4-5ReservedReservedReservedReserved
6PTG Trigger 26InternalPTG Trigger 26Internal
7PTG Trigger 27InternalPTG Trigger 27Internal
8-10ReservedReservedReservedReserved
11PWM Event Out CInternalPWM Event Out CInternal
12PWM Event Out DInternalPWM Event Out DInternal
13PWM Event Out EInternalPWM Event Out EInternal
14-31ReservedReservedReservedReserved
32RP32 Port Pin RB0RP32 Port Pin RB0
33RP33 Port Pin RB1RP33 Port Pin RB1
34RP34 Port Pin RB2RP34 Port Pin RB2
35RP35 Port Pin RB3RP35 Port Pin RB3
36RP36 Port Pin RB4RP36 Port Pin RB4
37RP37 Port Pin RB5RP37 Port Pin RB5
38RP38 Port Pin RB6RP38 Port Pin RB6
39RP39 Port Pin RB7RP39 Port Pin RB7
40RP40 Port Pin RB8RP40 Port Pin RB8
41RP41 Port Pin RB9RP41 Port Pin RB9
42RP42 Port Pin RB10RP42 Port Pin RB10
43RP43 Port Pin RB11RP43 Port Pin RB11
44RP44 Port Pin RB12RP44 Port Pin RB12
45RP45 Port Pin RB13RP45 Port Pin RB13
46RP46 Port Pin RB14RP46 Port Pin RB14
47RP47 Port Pin RB15RP47 Port Pin RB15
48RP48 Port Pin RC0RP48 Port Pin RC0
49RP49 Port Pin RC1RP49 Port Pin RC1
50RP50 Port Pin RC2RP50 Port Pin RC2
51RP51 Port Pin RC3RP51 Port Pin RC3
52RP52 Port Pin RC4RP52 Port Pin RC4
53RP53 Port Pin RC5RP53 Port Pin RC5
54RP54 Port Pin RC6RP54 Port Pin RC6
55RP55 Port Pin RC7RP55 Port Pin RC7
56RP56 Port Pin RC8RP56 Port Pin RC8
57RP57 Port Pin RC9RP57 Port Pin RC9
58RP58 Port Pin RC10RP58 Port Pin RC10
59RP59 Port Pin RC11RP59 Port Pin RC11
60RP60 Port Pin RC12RP60 Port Pin RC12
61RP61 Port Pin RC13RP61 Port Pin RC13
62RP62 Port Pin RC14ReservedReserved
63RP63 Port Pin RC15ReservedReserved
64RP64 Port Pin RD0ReservedReserved
65RP65 Port Pin RD1RP65 Port Pin RD1
66RP66 Port Pin RD2ReservedReserved
67RP67 Port Pin RD3ReservedReserved
68RP68 Port Pin RD4ReservedReserved
69RP69 Port Pin RD5ReservedReserved
70RP70 Port Pin RD6ReservedReserved
71RP71 Port Pin RD7ReservedReserved
72RP72 Port Pin RD8RP72 Port Pin RD8
73RP73 Port Pin RD9ReservedReserved
74RP74 Port Pin RD10RP74 Port Pin RD10
75RP75 Port Pin RD11ReservedReserved
76RP76 Port Pin RD12ReservedReserved
77RP77 Port Pin RD13RP77 Port Pin RD13
78RP78 Port Pin RD14ReservedReserved
79RP79 Port Pin RD15ReservedReserved
80-165ReservedReservedReservedReserved
166ReservedReservedReservedReserved
167ReservedReservedReservedReserved
168DAC1 pwm_req_onInternalDAC1 pwm_req_onInternal
169DAC1 pwm_req_offInternalDAC1 pwm_req_offInternal
170-175ReservedReservedReservedReserved
176RP176 Virtual RPV0RP176 Virtual RPV0
177RP177 Virtual RPV1RP177 Virtual RPV1
178RP178 Virtual RPV2RP178 Virtual RPV2
179RP179 Virtual RPV3RP179 Virtual RPV3
180RP180 Virtual RPV4RP180 Virtual RPV4
181RP181 Virtual RPV5RP181 Virtual RPV5
Table 8-4. Selectable Input Sources (Maps Input to Function)
Input Name(1)Function NameRegisterRegister Bits
External Interrupt 1INT1 RPINR0INT1R[7:0]
External Interrupt 2INT2 RPINR1INT2R[7:0]
External Interrupt 3INT3RPINR1INT3R[7:0]
Timer1 External ClockT1CKRPINR2T1CK[7:0]
SCCP Timer1TCKI1RPINR3TCKI1R[7:0]
SCCP Capture 1ICM1RPINR3ICM1R[7:0]
SCCP Timer2TCKI2RPINR4TCKI2R[7:0]
SCCP Capture 2ICM2RPINR4ICM2R[7:0]
SCCP Timer3TCKI3RPINR5TCKI3R[7:0]
SCCP Capture 3ICM3RPINR5ICM3R[7:0]
SCCP Timer4TCKI4RPINR6TCKI4R[7:0]
SCCP Capture 4ICM4RPINR6ICM4R[7:0]
SCCP Fault A OCFA RPINR11OCFAR[7:0]
SCCP Fault B OCFB RPINR11OCFBR[7:0]
PWM PCI Input 8PCI8RPINR12PCI8R[7:0]
PWM PCI Input 9PCI9RPINR12PCI9R[7:0]
PWM PCI Input 10PCI10RPINR13PCI10R[7:0]
PWM PCI Input 11PCI11RPINR13PCI11R[7:0]
UART1 ReceiveU1RX RPINR18U1RXR[7:0]
UART1 Data-Set-ReadyU1DSRRPINR18U1DSRR[7:0]
UART2 ReceiveU2RX RPINR19U2RXR[7:0]
UART2 Data-Set-ReadyU2DSRRPINR19U2DSRR[7:0]
SPI1 Data InputSDI1RPINR20SDI1R[7:0]
SPI1 Clock InputSCK1INRPINR20SCK1R[7:0]
SPI1 Client SelectSS1RPINR21SS1R[7:0]
Reference Clock Input REFCLKIRPINR21REFOIR[7:0]
SPI2 Data InputSDI2 RPINR22SDI2R[7:0]
SPI2 Clock InputSCK2IN RPINR22SCK2R[7:0]
SPI2 Client SelectSS2RPINR23SS2R[7:0]
CAN1 Input (CAN1RX) CAN1RXRPINR26CAN1RXR[7:0]
UART3 ReceiveU3RXRPINR27U3RXR[7:0]
UART3 Data-Set-ReadyU3DSRRPINR27U3DSRR[7:0]
SCCP Fault COCFCRPINR37OCFCR[7:0]
PWM PCI Input 17PCI17RPINR37PCI17R[7:0]
PWM PCI Input 18PCI18RPINR38PCI18R[7:0]
PWM PCI Input 12PCI12RPINR42PCI12R[7:0]
PWM PCI Input 13PCI13RPINR42PCI13R[7:0]
PWM PCI Input 14PCI14RPINR43PCI14R[7:0]
PWM PCI Input 15 PCI15RPINR43PCI15R[7:0]
PWM PCI Input 16 PCI16RPINR44PCI16R[7:0]
SENT1 InputSENT1RPINR44SENT1R[7:0]
CLC Input ACLCINARPINR45CLCINAR[7:0]
CLC Input BCLCINBRPINR46CLCINBR[7:0]
CLC Input CCLCINCRPINR46CLCINCR[7:0]
CLC Input DCLCINDRPINR47CLCINDR[7:0]
ADC Trigger Input (ADTRIG31)ADCTRGRPINR47ADCTRGR[7:0]
SCCP Fault DOCFDRPINR48OCFDR[7:0]
UART1 Clear-to-SendU1CTSRPINR48U1CTSR[7:0]
UART2 Clear-to-SendU2CTSRPINR49U2CTSR[7:0]
UART3 Clear-to-SendU3CTSRPINR49U3CTSR[7:0]
Note:
  1. Unless otherwise noted, all inputs use the Schmitt Trigger input buffers.

Configuring UART1 Input and Output Functions

//
*******************************************
// Unlock Registers
//*****************************************
__builtin_write_RPCON(0x0000);
//*****************************************
// Configure Input Functions (See Table 3-32)
// Assign U1Rx To Pin RP35
//***************************
_U1RXR = 35;
// Assign U1CTS To Pin RP36
//***************************
_U1CTSR = 36;
//*****************************************
// Configure Output Functions (See Table 3-34)
//*****************************************
// Assign U1Tx To Pin RP37
//***************************
_RP37R = 1;
//***************************
// Assign U1RTS To Pin RP38
//***************************
_RP38R = 2;
//*****************************************
// Lock Registers
//*****************************************
__builtin_write_RPCON(0x0800);