8.9 Mapping Limitations

The control schema of the peripheral select pins is not limited to a small range of fixed peripheral configurations. There are no mutual or hardware-enforced lockouts between any of the peripheral mapping SFRs. Literally, any combination of peripheral mappings, across any or all of the RPn pins, is possible. This includes both many-to-one and one-to-many mappings of peripheral inputs and outputs to pins. While such mappings may be technically possible from a configuration point of view, they may not be supportable from an electrical point of view (see Table 8-5).

Table 8-5. Remappable Output Pin Registers⁽¹⁾
Register	dsPIC33CK256/128: RP Pin	dsPIC33CK256/128: I/O Port	dsPIC33CK64/32: RP Pin	dsPIC33CK64/32: I/O Port
RPOR0[5:0]	RP32	Port Pin RB0	RP32	Port Pin RB0
RPOR0[13:8]	RP33	Port Pin RB1	RP33	Port Pin RB1
RPOR1[5:0]	RP34	Port Pin RB2	RP34	Port Pin RB2
RPOR1[13:8]	RP35	Port Pin RB3	RP35	Port Pin RB3
RPOR2[5:0]	RP36	Port Pin RB4	RP36	Port Pin RB4
RPOR2[13:8]	RP37	Port Pin RB5	RP37	Port Pin RB5
RPOR3[5:0]	RP38	Port Pin RB6	RP38	Port Pin RB6
RPOR3[13:8]	RP39	Port Pin RB7	RP39	Port Pin RB7
RPOR4[5:0]	RP40	Port Pin RB8	RP40	Port Pin RB8
RPOR4[13:8]	RP41	Port Pin RB9	RP41	Port Pin RB9
RPOR5[5:0]	RP42	Port Pin RB10	RP42	Port Pin RB10
RPOR5[13:8]	RP43	Port Pin RB11	RP43	Port Pin RB11
RPOR6[5:0]	RP44	Port Pin RB12	RP44	Port Pin RB12
RPOR6[13:8]	RP45	Port Pin RB13	RP45	Port Pin RB13
RPOR7[5:0]	RP46	Port Pin RB14	RP46	Port Pin RB14
RPOR7[13:8]	RP47	Port Pin RB15	RP47	Port Pin RB15
RPOR8[5:0]	RP48	Port Pin RC0	RP48	Port Pin RC0
RPOR8[13:8]	RP49	Port Pin RC1	RP49	Port Pin RC1
RPOR9[5:0]	RP50	Port Pin RC2	RP50	Port Pin RC2
RPOR9[13:8]	RP51	Port Pin RC3	RP51	Port Pin RC3
RPOR10[5:0]	RP52	Port Pin RC4	RP52	Port Pin RC4
RPOR10[13:8]	RP53	Port Pin RC5	RP53	Port Pin RC5
RPOR11[5:0]	RP54	Port Pin RC6	RP54	Port Pin RC6
RPOR11[13:8]	RP55	Port Pin RC7	RP55	Port Pin RC7
RPOR12[5:0]	RP56	Port Pin RC8	RP56	Port Pin RC8
RPOR12[13:8]	RP57	Port Pin RC9	RP57	Port Pin RC9
RPOR13[5:0]	RP58	Port Pin RC10	RP58	Port Pin RC10
RPOR13[13:8]	RP59	Port Pin RC11	RP59	Port Pin RC11
RPOR14[5:0]	RP60	Port Pin RC12	RP60	Port Pin RC12
RPOR14[13:8]	RP61	Port Pin RC13	RP61	Port Pin RC13
RPOR15[5:0]	RP62	Port Pin RC14	RP65	Port Pin RD1
RPOR15[13:8]	RP63	Port Pin RC15	RP72	Port Pin RD8
RPOR16[5:0]	RP64	Port Pin RD0	RP74	Port Pin RD10
RPOR16[13:8]	RP65	Port Pin RD1	RP77	Port Pin RD13
RPOR17[5:0]	RP66	Port Pin RD2	RP176	Virtual pin RPV0
RPOR17[13:8]	RP67	Port Pin RD3	RP177	Virtual pin RPV1
RPOR18[5:0]	RP68	Port Pin RD4	RP178	Virtual pin RPV2
RPOR18[13:8]	RP69	Port Pin RD5	RP179	Virtual pin RPV3
RPOR19[5:0]	RP70	Port Pin RD6	RP180	Virtual pin RPV4
RPOR19[13:8]	RP71	Port Pin RD7	RP181	Virtual pin RPV5
RPOR20[5:0]	RP72	Port Pin RD8	—	—
RPOR20[13:8]	RP73	Port Pin RD9	—	—
RPOR21[5:0]	RP74	Port Pin RD10	—	—
RPOR21[13:8]	RP75	Port Pin RD11	—	—
RPOR22[5:0]	RP76	Port Pin RD12	—	—
RPOR22[13:8]	RP77	Port Pin RD13	—	—
RPOR23[5:0]	RP78	Port Pin RD14	—	—
RPOR23[13:8]	RP79	Port Pin RD15	—	—
RPOR24[5:0]	RP176	Virtual pin RPV0	—	—
RPOR24[13:8]	RP177	Virtual pin RPV1	—	—
RPOR25[5:0]	RP178	Virtual pin RPV2	—	—
RPOR25[13:8]	RP179	Virtual pin RPV3	—	—
RPOR26[5:0]	RP180	Virtual pin RPV4	—	—
RPOR26[13:8]	RP181	Virtual pin RPV5	—	—
Note: Not all RPn pins are available on all packages. Make sure the selected device variant has the feature  available on the device. Availability is dependent on supported I/O ports. Refer to Table 8-1 for availability on device variants.

Table 8-6. Output Selection for Remappable Pins (RPn)⁽¹⁾
Value	dsPIC33CK256/128: Function	dsPIC33CK64/32: Function	Output Name
0	Default PORT	Default PORT	RPn tied to Default Pin
1	U1TX	U1TX	RPn tied to UART1 Transmit
2	U1RTS	U1RTS	RPn tied to UART1 Request-to-Send
3	U2TX	U2TX	RPn tied to UART2 Transmit
4	U2RTS	U2RTS	RPn tied to UART2 Request-to-Send
5	SDO1	SDO1	RPn tied to SPI1 Data Output
6	SCK1	SCK1	RPn tied to SPI1 Clock Output
7	SS1	SS1	RPn tied to SPI1 Slave Select
8	SDO2	SDO2	RPn tied to SPI2 Data Output
9	SCK2	SCK2	RPn tied to SPI2 Clock Output
10	SS2	SS2	RPn tied to SPI2 Slave Select
14	REFCLKO	REFCLKO	RPn tied to Reference Clock Output
15	OCM1	OCM1A	RPn tied to SCCP1 Output
16	OCM2	OCM2A	RPn tied to SCCP2 Output
17	OCM3	OCM3A	RPn tied to SCCP3 Output
18	OCM4	OCM4A	RPn tied to SCCP4 Output
21	CAN1TX	Reserved	RPn tied to CAN1 Output
23	CMP1	CMP1	RPn tied to Comparator 1 Output
27	U3TX	U3TX	RPn tied to UART3 Transmit
28	U3RTS	U3RTS	RPn tied to UART3 Request-to-Send
34	PWM4H	PWM4H	RPn tied to PWM4H Output
35	PWM4L	PWM4L	RPn tied to PWM4L Output
36	PWMEA	PWMEA	RPn tied to PWM Event A Output
37	PWMEB	PWMEB	RPn tied to PWM Event B Output
38	QEICMP	QEICMP1	RPn tied to QEI Comparator Output
40	CLC1OUT	CLC1OUT	RPn tied to CLC1 Output
41	CLC2OUT	CLC2OUT	RPn tied to CLC2 Output
44	PWMEC	PWMEC	RPn tied to PWM Event C Output
45	PWMED	PWMED	RPn tied to PWM Event D Output
46	PTGTRG24	PTGTRG24	PTG Trigger Output 24
47	PTGTRG25	PTGTRG25	PTG Trigger Output 25
48	SENT1OUT	SENT1OUT	RPn tied to SENT1 Output
59	CLC3OUT	CLC3OUT	RPn tied to CLC3 Output
60	CLC4OUT	CLC4OUT	RPn tied to CLC4 Output
61	U1DTR	U1DTR	Data Terminal Ready Output 1
62	U2DTR	U2DTR	Data Terminal Ready Output 2
63	U3DTR	U3DTR	RPn tied to UART3 DTR
Note: Not all RPn pins are available on all packages. Make sure the selected device variant has the feature  available on the device.