4.1 Program Address Space

The program address memory space of the dsPIC33CK256MC006 family devices is 4M instructions. The space is addressable by a 24-bit value derived either from the 23-bit PC during program execution, or from table operation or Data Space remapping, as described in Interfacing Program and Data Memory Spaces.

User application access to the program memory space is restricted to the lower half of the address range (0x000000 to 0x7FFFFF). The exception is the use of TBLRD operations, which use TBLPAG[7] to permit access to calibration data and Device ID sections of the configuration memory space.

The program memory maps for dsPIC33CK256MC006 devices are shown in Figure 4-1 through Figure 4-5.

Figure 4-1. Program Memory Map for dsPIC33CKXXXMC00X Device(1)
Note:
  1. Memory areas are not shown to scale.
  2. The calibration data area must be maintained during programming.
  3. The calibration data area includes UDID, ICSP™ Write Inhibit and FBOOT registers’ locations.
Figure 4-2. Program Memory Map for dsPIC33CK256MC00X Devices
Figure 4-3. Program Memory Map for dsPIC33CK128MC00X Devices
Figure 4-4. Program Memory Map for dsPIC33CK64MC00X
Figure 4-5. Program Memory Map for dsPIC33CK32MC00X