13.4.8.5 Repeated Continuous Mode

Repeated Continuous mode (TRMODE[1:0] = 11) can be thought of as a combination of Continuous and Repeated One-Shot modes; data transfers keep occurring as long as triggers are provided, and multiple transfers can occur with each trigger. Like Continuous mode, each transfer decrements DMAxCNT. When it reaches 0000h, the address and count registers are reloaded, and the process is repeated.

Like Repeated One-Shot mode, ending the sequence requires disabling the channel, either by disabling the trigger source or clearing the CHEN bit in software.

Typical Code Sequence for a Repeated Continuous Transfer (Memory to Memory, RELOADS = 1, RELOADD = 1) shows a typical code sequence for a Repeated Continuous mode transfer.

Typical Code Sequence for a Repeated Continuous Transfer (Memory to Memory, RELOADS = `1`, RELOADD = `1`)

unsigned int Array1[100];
unsigned int Array2[100];
int i;

int main()
{
    
    for (i=0;i<100;i++)
    {
        Array1[i]=i+1;         //fill with i+1
        Array2[i]=0;           //fill with 0
    }
    
    DMACONbits.ON=1; //Enable DMA
     
    DMACONbits.PRIORITY = 1;  //Robin is round
    
    //Set lower and upper address limit
    DMAHIGH=0x5000;
    DMALOW=0x4000;
    
    DMA0SRC=(unsigned int)& Array1;     // load the source address
    DMA0DST=(unsigned int)& Array2;     // load destination address
    DMA0CNT=100;                        // 100 Transactions per trigger
    
    DMA0CH=0;
    DMA0CHbits.SAMODE=1;                //Source address increment mode
    DMA0CHbits.DAMODE=1;                //Destination address increment mode
    DMA0CHbits.TRMODE=3;                //Transfer mode Repeat continuous
    DMA0CHbits.RELOADS=1;               //Reload Source Address
    DMA0CHbits.RELOADD=1;               //Reload Destination Address
    DMA0CHbits.DONEEN=1;                //Enable interrupt on DONE being set
    DMA0CHbits.SIZE=2;                  //One 32-bit word transferred at a time
    DMA0CHbits.CHEN=1;                  //Channel enable
    IFS2bits.DMA0IF=0;
    
    while(1)
    {
        DMA0CHbits.CHREQ=1;             //TIGGER
        while(!IFS2bits.DMA0IF);        //Wait for transaction to complete
        
        Nop();
        
        //Clear the Destination Memory
        for (i=0;i<100;i++)
        {
            Array2[i]=0;                //fill with 0
        }
        
        //Clear done interrupt flag and status bits prior to re-triggering
        IFS2bits.DMA0IF=0;
        DMA0STATbits.DONE=0;
        DMA0STATbits.HALF=0;
    }
}