Jump to main content

High-Performance dsPIC33A Core with Floating-Point Unit, High-Speed ADCs and High-Speed PWM

Home
30 Current Bias Generator (CBG)
30.2 Architectural Overview

Operating Conditions
High-Performance dsPIC33A DSP/CISC CPU
Memory Features
Security Features
High-Speed PWM
High-Speed Analog-to-Digital Converters
Peripheral Features
Analog Features
Safety Features
Functional Safety Support
Qualification
Programming and Debug Interfaces
dsPIC33AK512MPS512 Family Features
Pin Diagrams
Pinout I/O Descriptions
Terminology Cross Reference
1 Device Overview
2 Guidelines for Getting Started with Digital Signal Controllers
3 CPU
4 Memory Organization
5 Data Memory
6 Flash Program Memory
7 Configuration Bits
8 Security Module
9 Resets
10 Interrupt Controller
11 I/O Ports with Edge Detect
12 Oscillator Module
13 Direct Memory Access (DMA) Controller
14 CAN Flexible Data-Rate (FD) Protocol Module
15 High-Resolution PWM with Fine Edge Placement
16 40 MSPS Analog-to-Digital Converter (ADC)
17 Integrated Touch Controller (ITC)
18 High-Speed Analog Comparator with Slope Compensation DAC
19 Quadrature Encoder Interface (QEI)
20 Universal Asynchronous Receiver Transmitter (UART)
21 Serial Peripheral Interface (SPI)
22 Inter-Integrated Circuit (I²C)
23 Single-Edge Nibble Transmission (SENT)
24 Bidirectional Serial Synchronous (BiSS) Module
25 Timers
26 Capture/Compare/PWM/Timer Modules (CCP)
27 Configurable Logic Cell (CLC)
28 Peripheral Trigger Generator (PTG)
29 32-Bit Programmable Cyclic Redundancy Check (CRC) Generator
30 Current Bias Generator (CBG)
- 30.1 Device-Specific Information
- 30.2 Architectural Overview
  - 30.2.1 Module Description
- 30.3 Current Bias Generator Control Register
  Current Bias Generator Control Register
- 30.4 Operation
- 30.5 Application Examples
- 30.6 Interrupts
- 30.7 Power-Saving Modes
- 30.8 Effects of a Reset
31 UREF Reference Output
32 Operational Amplifier (Op Amp)
33 Watchdog Timer (WDT)
34 Deadman Timer (DMT)
35 Device Power-Saving Modes
36 JTAG Interface
37 In-Circuit Debugger
38 Instruction Set Summary
39 Development Support
40 Electrical Characteristics
41 Packaging Information
42 Revision History
43 Product Identification System
Microchip Information

30.2 Architectural Overview

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

About

Company

Careers

Contact Us

Media Center

Investor Relations

Corporate Responsibility

Support

Microchip Forums

AVR Freaks

Design Help

Technical Support

Export Control Data

PCNs

Quick Links

microchipDIRECT.com

Microchip University

myMicrochip

Blogs

Reference Designs

Parametric Search

Microchip Technology Inc.

2355 West Chandler Blvd.

Chandler, Arizona, USA

Microchip Twitter

Microchip Weibo

© Copyright 1998-2024 Microchip Technology Inc. All rights reserved. Shanghai ICP Recordal No.09049794

Terms Of Use

Privacy Notice

Legal

Your Privacy Choices California Consumer Privacy Act (CCPA) Opt-Out Icon

California Consumer Privacy Act (CCPA) Opt-Out Icon