9.2 Register Summary
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x31A0 | RCON | 31:24 | ||||||||
| 23:16 | VREG4R | VREG3R | VREG2R | BUCKR | ||||||
| 15:8 | CM | |||||||||
| 7:0 | EXTR | SWR | WDTO | SLEEP | IDLE | BOR | POR |
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x31A0 | RCON | 31:24 | ||||||||
| 23:16 | VREG4R | VREG3R | VREG2R | BUCKR | ||||||
| 15:8 | CM | |||||||||
| 7:0 | EXTR | SWR | WDTO | SLEEP | IDLE | BOR | POR |
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