21.4.2.3 Audio Data Length and Frame Length
Table 21-7 illustrates how the MODE[32,16] bits (SPIxCON1[11:10]) control the maximum allowable sample length and frame length (LRCK period on SSx).
SPIxCON1[11:10] |
Data Length (bits) |
FIFO Width (bits) |
Left/Right Channel Sample Length (bits) |
Enhanced Buffer FIFO Depth (samples)(1) |
LRCK Period Frame Length (bits) | |
---|---|---|---|---|---|---|
MODE32 | MODE16 | |||||
0 | 0 | 16 | 16 | ≤ 16 | X/2 | 32 |
0 | 1 | 16 | 16 | ≤ 32 | X/2 | 64 |
1 | 1 | 24 | 32 | ≤ 32 | X/4 | 64 |
1 | 0 | 32 | 32 | ≤ 32 | X/4 | 64 |
Note: FIFO depth varies
between devices. The data shown are specified considering a device
with an available FIFO depth of 'X'.
|
The parameters of the MODE[32,16] bits (SPIxCON1[11:10]) have the following behavior:
- Controls left/right channel data length, frame length
- In 16-bit Sample mode, a 32/64-bit frame length is supported
- In 24/32-bit Sample mode, a 64-bit frame length is supported
- Defines FIFO width and depth (for example, 24-bit data have a 32-bit wide and X/4-location deep FIFO)
- If the written data are greater than the data selected, the upper bytes are ignored
- If the written data are less than the data selected, the FIFO Pointers change on the write to the MSB of the selected length
If this data are written to the transmit FIFO in more than one write, the write order must be from Least Significant to Most Significant.
For example, assume that audio data are 24 bits per sample with 8 bits available at a time. According to Table 21-7, the FIFO width is 32 bits per sample. Therefore, the 8 MSbs, bits[31:24], in each FIFO sample are ignored.
Data written to unused bytes are ignored. Also, transactions that are only to unused bytes are also ignored. Therefore, a byte write to address offset, 0x0023, is completely ignored and does not cause a FIFO push if the data are less than 32 bits wide.