12.4.7 Clock Monitor Module

The dsPIC33A Fail-Safe Clock Monitor provides the following features:

  • Configurable Clock Sources
  • Monitored Clock Sources
  • Reference Clock Sources
  • Flexible Detection Capability
  • Monitored Clock Frequency Drift Detection
  • Selectable Threshold Limits for Warning and/or Failing
  • Monitored Clock Catastrophic Detection
  • Reference Clock Catastrophic Detection
  • User Optimizable Accuracy via:
    • Accumulation time adjustment
    • Selectable clock sources
  • Register Write Protection
  • Fault Injection Capability
  • General Support for Failed Safe Clock Monitor Function
  • Interface to the Main Clock Switch (MCS) Macro
  • General Support for Frequency Measurement Function
  • Interface to the Unified Peripheral Bus (UPB) for Captured Count Access
  • Pulse Width and Duty Cycle Measurement
Figure 12-9. Clock Monitor Architecture