17.3.3 ADC n Data Ready Flags Register

Legend: n = ADC number; HS = Hardware Settable bit; HC = Hardware Clearable bit

Name: ADnSTAT
Offset: 0x808, 0xA08, 0xB48, 0xC68, 0xD88

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 CH[7:0]RDY 
Access HS/HCHS/HCHS/HCHS/HCHS/HCHS/HCHS/HCHS/HC 
Reset 00000000 

Bits 7:0 – CH[7:0]RDY Channel x Data Ready bits

Each bit in this register is set by hardware when the corresponding channel x data is written into ADnDATAx register. The bit is cleared by hardware when ADnDATAx register is read by software.