68.7.37 PWM Comparison x Value Register

Only the first 16 bits (channel counter size) of field CV are significant.

Name: PWM_CMPVx
Offset: 0x0130 + x*0x10 [x=0..7]
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
        CVM 
Access R/W 
Reset 0 
Bit 2322212019181716 
 CV[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 CV[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 CV[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 24 – CVM Comparison x Value Mode

ValueDescription
0

The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is incrementing.

1

The comparison x between the counter of the channel 0 and the comparison x value is performed when this counter is decrementing.

Note: This bit is not relevant if the counter of the channel 0 is left-aligned (CALG = 0 in PWM Channel Mode Register)

Bits 23:0 – CV[23:0] Comparison x Value

Define the comparison x value to be compared with the counter of the channel 0.