68.7.4 PWM Status Register

Name: PWM_SR
Offset: 0x0C
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     CHID3CHID2CHID1CHID0 
Access RRRR 
Reset 0000 

Bits 0, 1, 2, 3 – CHIDx Channel ID

ValueDescription
0

PWM output for channel x is disabled.

1

PWM output for channel x is enabled.