68.7.31 PWM Spread Spectrum Update Register

This register can only be written if bits WPSWS3 and WPHWS3 are cleared in the PWM Write Protection Status Register.

This register acts as a double buffer for the SPRD value. This prevents an unexpected waveform when modifying the spread spectrum limit value.

Only the first 16 bits (channel counter size) are significant.

Name: PWM_SSPUP
Offset: 0xA4
Reset: 
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 SPRDUP[23:16] 
Access WWWWWWWW 
Reset  
Bit 15141312111098 
 SPRDUP[15:8] 
Access WWWWWWWW 
Reset  
Bit 76543210 
 SPRDUP[7:0] 
Access WWWWWWWW 
Reset  

Bits 23:0 – SPRDUP[23:0] Spread Spectrum Limit Value Update

The spread spectrum limit value defines the range for the spread spectrum counter. It is introduced in order to achieve constant varying period for the output waveform.