9.2.1.2 CPU Interface

USB OTG controller sends interrupts to the Cortex-M3 processor using the CPU interface. The SmartFusion 2 USB OTG controller sends interrupts for the following events:

When packets are transmitted or received
When the USB OTG controller enters Suspend mode
When USB OTG resumes from Suspend mode

The CPU interface block contains the common configuration registers and the interrupt control logic for configuring the OTG controller.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.