9.2.1 Architecture Overview

The following block diagram highlights the main blocks in the USB OTG controller. The USB OTG controller is interfaced through the advanced high-performance bus (AHB) matrix in the MSS. The SmartFusion 2 USB OTG provides two interfaces (ULPI and UTMI) to connect to the external PHY. Following are the main component blocks in the USB OTG controller:

AHB Master and Slave Interfaces
CPU Interface
Endpoints (EP) Control Logic and RAM Control Logic
Packet Encoding, Decoding, and CRC Block
UTM Synchronization
PHY Interfaces

Figure 9-2. USB OTG Controller in SmartFusion 2