13.4.1 SYSREG Configuration Register Summary

The registers listed in the following table control the behavior of the SPI peripherals. For a detailed description of each register and bit, see the Serial Peripheral Interface Controller.

Table 13-7. SYSREG Control Registers
Register NameRegister TypeFlash Writer ProtectReset SourceDescription
Table   1RW-PBitSYSRESET_NSoft reset control
Loopback Control RegisterRW-PRegisterSYSRESET_NLoop back control
Peripheral Clock MUX Select Control RegisterRW-PRegisterPORESET_NPeripheral clock MUX select