22.3.2.1.1 Software Design Flow

The software design flow consists of enabling the interrupts and the implementation of interrupt handlers. The interrupt handler executes on the occurrence of interrupts. The following is a description of the software application programming interfaces (APIs).

Enabling the Fabric to the MSS Interrupt

This function enables the fabric to the MSS interrupt, MSS_INT_F2M, in the Cortex-M3 NVIC interrupt controller by calling the following API:

NVIC_EnableIRQ (FabricIrqX_IRQn);

where X can be set from 0 to15.

FabricIrqX_IRQn represents interrupt source numbers, which are connected to the NVIC of the  Cortex-M3 processor in the MSS. The following table gives the interrupt source numbers that correspond to the fabric to MSS interrupt, MSS_INT_F2M, signals.

Table 22-3. Interrupt Source Numbers
F2M Interrupt Signal	Interrupt Number	Interrupt Type
MSS_INT_F2M [0]	34	FabricIrq0_IRQn
MSS_INT_F2M [1]	35	FabricIrq1_IRQn
MSS_INT_F2M [2]	36	FabricIrq2_IRQn
MSS_INT_F2M [3]	37	FabricIrq3_IRQn
MSS_INT_F2M [4]	38	FabricIrq4_IRQn
MSS_INT_F2M [5]	39	FabricIrq5_IRQn
MSS_INT_F2M [6]	40	FabricIrq6_IRQn
MSS_INT_F2M [7]	41	FabricIrq7_IRQn
MSS_INT_F2M [8]	42	FabricIrq8_IRQn
MSS_INT_F2M [9]	43	FabricIrq9_IRQn
MSS_INT_F2M [10]	44	FabricIrq10_IRQn
MSS_INT_F2M [11]	45	FabricIrq11_IRQn
MSS_INT_F2M [12]	46	FabricIrq12_IRQn
MSS_INT_F2M [13]	47	FabricIrq13_IRQn
MSS_INT_F2M [14]	48	FabricIrq14_IRQn
MSS_INT_F2M [15]	49	FabricIrq15_IRQn

For more information, see the interrupts section in the Cortex-M3 Processor Overview and Debug Features.

Fabric to the MSS Interrupt Handler

This interrupt handler executes on the occurrence of the fabric to MSS interrupts. This is done by calling the following API:

void FabricIrqX_IRQHandler (void);

where X can be set from 0 to 15.

Clearing the Pending Interrupt

The NVIC_ClearPendingIRQ() function is used to clear the interrupt in the Cortex-M3 interrupt controller (NVIC). The following API is used to clear the fabric to the MSS interrupt:

NVIC_ClearPendingIRQ(FabricIrqX_IRQn);

where X can be set from 0 to 15.

Important: Once Fabric to MSS Interrupt is asserted, user logic in the fabric must keep the interrupt asserted until it is cleared by the Cortex-M3 processor firmware.