27.4.4.4.2 Output Enable Synchronization
Changes to the OCAEN control bit may be optionally synchronized to the timer period, allowing software changes to PWM settings be synchronized to the PWM period’s boundaries. This prevents incomplete output pulses as a result of steering changes.
The OENSYNC control bit (CCPxCON2[31]) controls the synchronization of the PWM output to
period boundaries. When OENSYNC = 1
, changes to the OCAEN control bit
take effect on a Timer Reset (i.e., the Sync input selected by SYNC[4:0] is asserted).
When OENSYNC = 0
, changes to the OCAEN control bit take effect
immediately. Figure 27-21 shows the effect of the
OENSYNC bit on the I/O pin shared by the OCx output.