The CCPxBUF[31:16] bits are
only available in 32-bit Input Capture modes. BUF[31:16] will read as
‘0’ when operating in a 16-bit Input Capture mode.
CCPxBUF[31:0] will read as
‘0’ for all Timer, Output Compare and PWM operating
modes.
BUFL = BUF[15:0] and BUFH =
BUF[31:16].
Table 27-12. Register Bit Attribute Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable
bit
HC
Cleared by
Hardware
(Gray
cell)
Unimplemented
W
Writable
bit
HS
Set by
Hardware
X
Bit is unknown
at Reset
C
Write to
clear
S
Software
settable bit
x
Channel
number
Name:
CCPxBUF
Offset:
0x1B20, 0x1B50,
0x1B80, 0x1BB0
Bit
31
30
29
28
27
26
25
24
BUF[31:24]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
BUF[23:16]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
BUF[15:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
BUF[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 31:0 – BUF[31:0]
Capture Buffer Value bits(1,2,3)
Indicates the oldest
captured time base value in the FIFO.
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