27.4.4.2.7 CCPxRA > CCPxRB

If CCPxRA > CCPxRB, a continuous train of pulses is generated. The timer counts up to the first match (CCPxTMRL = CCPxRA) and the first (rising) edge is generated. CCPxTMRL continues to count up, resetting when the Sync source selected by SYNC[4:0] is asserted. The timer then counts up to the second match (CCPxTMRL = CCPxRB), at which time the second (falling) edge of the signal is generated. The CCPxIF interrupt is generated on the falling edge of the output pulse. The sequence repeats until the module is disabled (Figure 27-19).

Figure 27-19. Timing for Dual Edge Compare (CCPxRA > CCPxRB)

Note: When operating in Dual Compare mode, the CCTxIF signal is asserted on a match between the CCPxRB register value and CCPxTMRL.