6.2.12 Captured PC Address at Time of Trap Register

Note:
  1. PCTRAP[0] always reads as 0.
  2. If the current IPL is greater or equal to 8, the PC address will not be captured.
  3. Hardware update is blocked after the first PCTRAP update occurs, preventing newer traps from overwriting the source address of older ones. Update can be re-enabled by writing 24’h000000 to PCTRAP (write will not occur, preserving PCTRAP contents).
Table 6-12. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: PCTRAP
Offset: 0x002C

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
  PCTRAP[22:16] 
Access RRRRRRR 
Reset 0000000 
Bit 15141312111098 
 PCTRAP[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 PCTRAP[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 22:0 – PCTRAP[22:0]  Captured PC Address at time of trap exception(1,2,3)