39.12 XOSC Electrical Specifications

Table 39-14. External Crystal Oscillator and Clock AC Electrical Specifications(1)
AC CHARACTERISTICSStandard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature :

-40°C ≤ TA ≤ +85°C for Industrial

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
XOSC_1FOSC_XOSCXOSC Crystal Frequency0.432MHzXOSCCTRLn.XTALEN = 1

XIN, XOUT Primary Oscillator

XOSC_1ATOSCTOSC = 1/FOSC_XOSC31.252500nsSee parameter XOSC1 for FOSC_XOSC value
XOSC_2XOSC_ST(1,3)XOSC Crystal Stabilization Time 12300TOSCCrystal stabilization time only, not Oscillator Ready.

CL = 20 pF, XOSC.GAIN = 0, 1, 2, 3, 4

XOSC_3CXINXOSC XIN parasitic pin capacitance5.9pF
XOSC_5CXOUTXOSC XOUT parasitic pin capacitance3.1pF
XOSC_11CLOAD(2) XOSC Crystal FOSC = 0.455 MHz100pF
XOSC_13 XOSC Crystal FOSC = 2 MHz20pF
XOSC_15 XOSC Crystal FOSC = 4 MHz20pF
XOSC_17 XOSC Crystal FOSC = 8 MHz20pF
XOSC_19 XOSC Crystal FOSC = 16 MHz20pF
XOSC_20 XOSC Crystal FOSC = 32 MHz12pF
XOSC_21ESR XOSC Crystal FOSC = 0.455 MHz443CL = 100 pF, XOSC.GAIN = 0
XOSC_23 XOSC Crystal FOSC = 2 MHz383CL = 20 pF, XOSC.GAIN = 0
XOSC_25 XOSC Crystal FOSC = 4 MHz218CL = 20 pF, XOSC.GAIN = 1
XOSC_27 XOSC Crystal FOSC = 8 MHz114CL = 20 pF, XOSC.GAIN = 2
XOSC_29 XOSC Crystal FOSC = 16 MHz58CL = 20 pF, XOSC.GAIN = 3
XOSC_30 XOSC Crystal FOSC = 32 MHz62CL = 12 pF, XOSC.GAIN = 4
XOSC_35FOSC_XCLKExternal Clock Oscillator Input Frequency (the XIN pin)048MHzXOSCCTRLn.XTALEN = 0
XOSC_37XCLK_DCExternal Clock Oscillator (the XIN pin) Duty Cycle405060%XOSCCTRLn.XTALEN = 0
XOSC_39XCLK_FSTPrimary XIN Clock Fail Safe Time-out Period4*1/(OSC48M_1/2^OSCCTRL.CFDPRESC)µs
Note:
  1. This is for guidance only. A major component of crystal start-up time is based on the second party crystal MFG parasitics that are outside the scope of this specification. If this is a major concern, the customer would need to characterize this based on their design choices.
  2. The Crystal Load Capacitor calculation is as follows:
    • Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (i.e., PCB STD TRACE W = 0.175 mm, H = 36 μm, T = 113 μm)
    • XTAL PCB capacitance typical therefore ~= 2.5 pF for a tight PCB XTAL layout
    • For CXIN and CXOUT within 4 pF of each other, Assume CXTAL_EFF = ((CXIN+CXOUT)/2)
      Note: Averaging CXIN and CXOUT will effect final calculated CLOAD value by less than 0.25 pF.
    Note:

    Equation 1:

    MFG CLOAD Spec = {( [CXIN + C1] * [CXOUT + C2] ) / [CXIN + C1 + C2 + CXOUT] } + estimated oscillator PCB stray capacitance

    • Assuming C1 = C2 and CXIN ~= CXOUT, the formula can be further simplified and restated to solve for C1 and C2 by:

    Equation 2 (Simplified version of equation 1):

    C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    For example:

    • XTAL Mfg CLOAD Data Sheet Specification = 12 pF
    • PCB XTAL trace Capacitance = 2.5 pF
    • CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF, therefore CXTAL_EFF = ((CXIN+CXOUT) / 2)

    CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

    C1 = C2 = ((2 * MFG CLOAD spec) - CXTAL_EFF - (2 * PCB capacitance))

    C1 = C2 = (24 - 5.5 - (2 * 2.5))

    C1 = C2 = 13.5 pF (always rounded down)

    C1 = C2 = 13 pF (i.e., for hypothetical example crystal external load capacitors)

    User C1 = C2 = 13 pF ≤ CLOAD(max) spec

  3. User selectable in XOSCCTRL.STARTUP.
Figure 39-2. XTAL