39.3 Power Supply

Table 39-5. Power Supply DC Electrical Specifications
DC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
REG_1	VDDCORE_CIN⁽¹⁾	VDDCORE Input Bypass parallel Capacitor pair	0.8	1	1.2	µF	Bulk Ceramic or solid Tantalum with ESR <0.5Ω. Minimum and maximum represent absolute values including cap tolerances.
REG_3	VDDCORE_CIN⁽¹⁾	VDDCORE Input Bypass parallel Capacitor pair	80	100	—	nF	Ceramic X7R with ESR <0.5Ω
REG_4	VDDIO_CIN⁽¹⁾	VDDIO Input Bypass parallel Capacitor pair	8	10⁽⁶⁾	—	µF	Bulk Ceramic or solid Tantalum with ESR <0.5Ω⁽²⁾
REG_5	VDDIO_CIN⁽¹⁾	VDDIO Input Bypass parallel Capacitor pair	80	100	—	nF	Ceramic X7R with ESR <0.5Ω on all VDDIO pins
REG_7	VDDIN_CIN⁽¹⁾	VDDIN Input Bypass parallel Capacitor pair	8	10⁽⁷⁾	—	µF	Bulk Ceramic or solid Tantalum with ESR <0.5Ω⁽²⁾
REG_8	VDDIN_CIN⁽¹⁾	VDDIN Input Bypass parallel Capacitor pair	80	100	—	nF	Ceramic X7R with ESR <0.5Ω on all VDDIO pins
REG_9	VREFA_CIN⁽¹⁾	External VREFA Input Bypass parallel Capacitor pair	3.76	4.7	—	µF	Bulk Ceramic or solid Tantalum with ESR <0.5Ω
REG_9	VREFA_CIN⁽¹⁾	External VREFA Input Bypass parallel Capacitor pair	80	100	—	nF	Ceramic X7R with ESR <0.5Ω
REG_17	AVDD_CIN⁽¹⁾	AVDD Input Bypass parallel Capacitor pair	8	10	—	µF	Bulk Ceramic or solid Tantalum with ESR <0.5Ω⁽²⁾
REG_19	AVDD_CIN⁽¹⁾	AVDD Input Bypass parallel Capacitor pair	80	100	—	nF	Ceramic X7R with ESR <0.5Ω
REG_23	AVDD_LEXT	AVDD series Ferrite Bead DCR (DC Resistance)	—	—	0.1	Ω	≥600 Ω at 100 MHz
REG_25	AVDD_LEXT	Ferrite Bead current Rating	500	—	—	mA
REG_36	VDDCORE	DC calibrated output voltage	1.08	1.23	1.32	V	—
REG_37	VDDIO, VDDIN, AVDD⁽³⁾	VDDIO, VDDIN, AVDD Input Voltage Range	2.7	—	5.5	V	—
REG_43	SVDDIO/VDD_R	VDDIN, AVDD, VDDIO Rise Ramp Rate to Ensure Internal Power-on Reset Signal	—	—	0.1	V/µs	Failure to meet this specification may lead to start-up or unexpected behaviors
REG_44	SVDDIO/VDD_F	VDDIN, AVDD, VDDIO Fall Ramp Rate to Ensure Internal Power-on Reset Signal	—	—	0.05	V/µs	Failure to meet this specification may cause the device to not detect reset
REG_45A	VPOR+	VDDIO/VDD Rising Power-on Reset		2.55		V	VDDIO/VDD power-up/power-down (See Param REG43, VDDIO/VDD Rise Ramp Rate)
REG_45B	VPOR-	VDDIO/VDD Falling Power-on Reset	1.53	1.75	1.97	V	VDDIO/VDD power-up/power-down (See Param REG43, VDDIO/VDD Fall Ramp Rate)
REG_47	VBODVDD^(4,5)	VDD BOD (All modes)^(4,5)	2.71	—	2.97	V	(Default Setting) LEVEL[ 5:0] = 0x8⁽⁴⁾ HYST[0] = 0x0
			2.71	—	3.05	V	(Default Setting) LEVEL[5:0] = 0x8^(4,5)HYST[0] = 0x1
			4.37	—	4.81	V	LEVEL[ 5:0] = 0x2C⁽⁴⁾ HYST[0] = 0x0
			4.37	—	4.88	V	LEVEL[ 5:0] = 0x2C^(4,5)HYST[0] = 0x1
REG_51	VBODVDDLEVEL_STEP	VBODVDD step size, LEVEL[7:0]	—	46	—	mV	Step Size
REG_52	VBODVDDHYST_STEP	VBODVDD Hysterisis step size, HYST[3:0]	—	(See Note 5)	—	mV	Step Size
REG_53	TRST	External RESET valid active pulse width	1	—	—	µs	Minimum reset active time to guarantee MCU reset
Note: All bypass caps should be located immediately adjacent to pins and on the same side of the PCB as the MCU. In single power supply configuration, only one bulk capacitor (REG_4 or REG_7) is enough for both VDDIN and VDDIO. In dual-power supply configuration, two bulk capacitors are needed: REG_4 for VDDIO and REG_7 for VDDIN. VDDIN and AVDD must be at the same voltage level. VDDIO should be lower or equal to VDDIN/AVDD. The common voltage is referred to as VDD in the data sheet. Some I/O are in the VDDIO cluster, but can be multiplexed as analog inputs or outputs (e.g., PTC.X[n] pads). In such a case, AVDD is used to power the I/O. Using this configuration may result in an electrical conflict if the VDDIO voltage is lower than the VDDIN/AVDD. VBODVDD(min) = 2.341 + d(BODVDD.LEVEL[5:0]) * 0.046. VBODVDD(max) at BODVDD.HYST[0] = 1 = VBODVDD(max) at BODVDD.HYST[0] = 0 + VBODVDDHYST_STEP VBODVDDHYST_STEP Graph: Shared between VDDIO, VDDIN, and AVDD in case of a common power supply VDDIO = VDDIN = AVDD. Shared between VDDIO, VDDIN, and AVDD in case of a common power supply VDDIO = VDDIN = AVDD. Else, shared between VDDIN = AVDD.