| Throughout: Reworked sections regarding asynchronous partial
wake-up. Updated Description. Updated TWI Compatibility with I2C
Standard. Updated TWI/SMBus Characteristics. Updated Modes of Operation. FLEX_US_MR: USART_MODE bit description table modified.
USART: modified content and some section and figure titles:
Overview, TXEMPTY, TXRDY and RXRDY Behavior, FIFO Single Data Access, FIFO Multiple Data Access, TXRDY and RXRDY Configuration, FIFO Pointer Error. SPI: : modified content and
some section and figure titles: Overview, TXEMPTY, TDRE and RDRF Behavior, SPI Single Data Access, SPI Multiple Data Access, TDRE and RDRF Configuration, DMAC_PDC, FIFO Pointer Error. TWI: : modified content and
some section and figure titles: Overview, Sending Data with FIFO Enabled, Receiving Data with FIFO Enabled, TXRDY and RXRDY Behavior, TWI Single Data Access, TWI Multiple Data Access, TXRDY and RXRDY Configuration, DMAC_PDC, FIFO Pointer Error, FIFO Thresholds. USART FIFO Mode Register, SPI FIFO Mode Register, TWI FIFO Mode Register: bitfield descriptions
modified. |
