| Global | Editorial changes throughout. | 
| Power Management Controller (PMC) | 
                             Main Clock Source Selection: updated naming to ULP1
                                mode. 
                            CKGR_MOR: updated naming to ULP1 mode. 
                            CKGR_MCFR: updated access for MAINF.  
                            PMC_SR: updated access for XT32KERR. 
                         | 
| DDR-SDRAM Controller (MPDDRC) | 
                             Renamed and updated Bus Monitor, Performance Monitor 
                         | 
| Static Memory Controller (SMC) | 
                             HSMC_ELPRIM, HSMC_MODE, HSMC_PMECCx: updated reset values. 
                            HSMC_MODE: added PS field. 
                         | 
| DMA Controller (XDMAC) | 
                             Description: updated. 
                            XDMAC_CC: updated reset value. 
                         | 
| Gigabit Ethernet MAC (GMAC) | 
                             Receive Buffer List: updated.  
                            Transmit Buffer List: updated. 
                            GTSUCOMP External Connection: updated. 
                         | 
| USB Device High-Speed Port (UDPHS) | 
                             Transfer Without DMA: modified code content. 
                         | 
| Synchronous Serial Controller (SSC) | 
                             Audio Sampling Rate Limitations: added. 
                            SSC_WPMR: updated WPEN bit description. 
                         | 
| Two-Wire Interface (TWIHS) | 
                             Asynchronous Partial Wake-Up: updated. 
                         | 
| Flexible Serial Communication Controller (FLEXCOM) | 
                            
                             Bus Clear Command, FIFO Pointer Error, FLEX_TWI_CR: modified. 
                            FLEX_TWI_SR: updated reset value 
                         | 
| Quad Serial Peripheral Interface (QSPI) | QSPI Bus Clock Modes: updated. | 
| Secure Digital MultiMedia Card Controller (SDMMC) | 
                             SDMMC_CA0R: added Note 2 
                            SDMMC_PSR: modified reset value 
                         | 
| Image Sensor Controller (ISC) | 
                            Index 16:31 now ‘ reserved’ in:   
                            Descriptor Memory Mapping: updated column “Address” in
                                tables Table 51-4, Table 51-5, Table 51-6 
                            ISC_DCTRL: updated DVIEW description.  
                         | 
| Pulse Width Modulation Controller (PWM) | 
                             Fault Protection: figure updated. 
                            PWM_SMMR: updated. 
                            PWM_ETRGx, PWM_LEBRx: updated. 
                         | 
| Advanced Encryption Standard (AES) | 
                             Secure Protocol layers Improved Performances:
                                updated. 
                            AES_MR: updated reset value. 
                         | 
| Triple Data Encryption Standard (TDES) | TDES_MR: updated reset value. | 
| Analog Comparator Controller (ACC) | 
                             Description, Embedded Characteristics: updated. 
                         | 
| Analog-to-Digital Controller (ADC) | 
                             Asynchronous Partial Wakeup: updated. 
                            ADC_EMR: updated. 
                         | 
| Electrical Characteristics | 
                             Absolute Maximum Ratings: added injected current
                                information. 
                            DC Characteristics: added. VIL and VIH
                                values updated. 
                            Table 66-5 to Table 66-8: added.  
                         |