37.4.25 I3CxMWL
Note:
- The Controller may update the value of this register by issuing a SETMWL CCC.
- In case of a race condition, user writes always take precedence over hardware events.
| Name: | I3CxMWL |
| Address: | 0x09D, 0x0D0 |
Maximum Write Length
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| MWL[15:0] | |||||||||
| Access | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MWL[15:0] | |||||||||
| Access | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | R/W/HS/HC | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – MWL[15:0] Maximum Write Length
| Value | Description |
|---|---|
| other | Maximum Write Length in bytes |
| 0 | Unlimited Maximum Write Length |