10.4.16 RAM with Initialization

The Fusion RAM with Initialization is nearly identical to the standard RAM, except that it generates extra logic so that it can interface with the Fusion Flash Memory System. The extra logic allows the RAMs to be switched to a x9 configuration during initialization or save-back to the Flash Memory. The RAM dynamically changes its user-selected configuration to the x9 configuration to interface more smoothly with the Flash Memory System.

This core has 2 sets of interfaces. The normal RAM interface and an additional interface known as the Flash Memory Block Interface. The Flash Memory Block Interface becomes active when either INITACTIVE or SAVEACTIVE are asserted. This switches the basic RAM blocks inside the core into a x9 data width mode to easily interface with the Flash Memory Block Interface.

For more information on how to connect up the RAM clock for initialization, see the Analog System Clocks topic.

Due to the cascading capabilities of the RAM macro, a RAM may be composed of multiple basic RAM blocks. Each of these RAM blocks have its own memory initialization file, thus Flash Memory Block treats each as a separate client. This also means that there is a separate enable and data out port for each RAM block.

For Dual Port RAMs, Port A is used for initialization and Port B is used for save-back to Flash Memory. For Two Port RAMs, the Write Port is used for initialization and the Read Port is used for save-back to Flash Memory.

The macro automatically includes the necessary logic for initialization. However, selecting the “Enable on demand save to Flash Memory” checkbox creates the necessary save-back interface.

Note: When using the save functionality, the Pipeline option must not be used on the Read port ( 2 Port ) or on Port B ( Dual Port ). This is because the Flash Memory Block save controller assumes that data is made available on the clock cycle following the address being given. Refer to the following timing diagram.

The additional ports that are exposed as part of the Flash Memory Block Interface for the RAM with Initialization are shown in the following table. These ports are meant to be connected to the Flash Memory module.

Table 10-205. RAM with Initialization I/O Description
Name	Direction	Description
INITADDR	Input	Active High; Address from Flash Memory module
INITDATA[08:00]	Input	Active High; Data from Flash Memory module
INIT_CLIENT_i	Input	Active High; Write enable signal from the Flash Memory module. This indicates that the data on the INITDATA bus is to be written into the RAM at the INITADDR location.There is a signal per RAM block used. For example, if the memory configuration required 4 RAM blocks, then there are 4 of these signals exported.These signals need to be connected to the<client_name>_block_i_DAT_VAL from the Flash Memory Block.
INITACTIVE	Input	Active High; Needs to be asserted when Initialization is being performed. Switches the aspect ratio to x9 width and changes the RAM to respond to the Initialization interface.
INITDOUT_i[08:00]	Output	Active High; Data to be saved into the Flash Memory module. There is a data out port per RAM block used. For example, if the memory configuration required 4 RAM blocks, then there would be 4 of these DOUT ports.These ports need to be connected to the<client_name>_block_i_DIN from the Flash Memory Block.
SAVEACTIVE	Input	Active High; Needs to be asserted when Save is being performed. Switches the aspect ratio to x9 width and changes the RAM to respond to the Save interface.The address location to be read is also driven from the INITADDR port for SAVE operations.