19.5 I2C Control/Status Registers
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x01FF | Reserved | |||||||||
| 0x0200 | I2C1CONL | 15:8 | I2CEN | I2CSIDL | SCLREL | STRICT | A10M | DISSLW | SMEN | |
| 7:0 | GCEN | STREN | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN | ||
| 0x0202 | I2C1CONH | 15:8 | ||||||||
| 7:0 | PCIE | SCIE | BOEN | SDAHT | SBCDE | AHEN | DHEN | |||
| 0x0204 | I2C1STAT | 15:8 | ACKSTAT | TRSTAT | ACKTIM | BCL | GCSTAT | ADD10 | ||
| 7:0 | IWCOL | I2COV | D/A | P | S | R/W | RBF | TBF | ||
0x0206 ... 0x020B | Reserved | |||||||||
| 0x020C | I2C1MSK | 15:8 | MSK[9:8] | |||||||
| 7:0 | MSK[7:0] | |||||||||
0x020E ... 0x021B | Reserved | |||||||||
| 0x021C | I2C2CONL | 15:8 | I2CEN | I2CSIDL | SCLREL | STRICT | A10M | DISSLW | SMEN | |
| 7:0 | GCEN | STREN | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN | ||
| 0x021E | I2C2CONH | 15:8 | ||||||||
| 7:0 | PCIE | SCIE | BOEN | SDAHT | SBCDE | AHEN | DHEN | |||
| 0x0220 | I2C2STAT | 15:8 | ACKSTAT | TRSTAT | ACKTIM | BCL | GCSTAT | ADD10 | ||
| 7:0 | IWCOL | I2COV | D/A | P | S | R/W | RBF | TBF | ||
0x0222 ... 0x0227 | Reserved | |||||||||
| 0x0228 | I2C2MSK | 15:8 | MSK[9:8] | |||||||
| 7:0 | MSK[7:0] | |||||||||
0x022A ... 0x0F5B | Reserved | |||||||||
| 0x0F5C | I2C3CONL | 15:8 | I2CEN | I2CSIDL | SCLREL | STRICT | A10M | DISSLW | SMEN | |
| 7:0 | GCEN | STREN | ACKDT | ACKEN | RCEN | PEN | RSEN | SEN | ||
| 0x0F5E | I2C3CONH | 15:8 | ||||||||
| 7:0 | PCIE | SCIE | BOEN | SDAHT | SBCDE | AHEN | DHEN | |||
| 0x0F60 | I2C3STAT | 15:8 | ACKSTAT | TRSTAT | ACKTIM | BCL | GCSTAT | ADD10 | ||
| 7:0 | IWCOL | I2COV | D/A | P | S | R/W | RBF | TBF | ||
0x0F62 ... 0x0F67 | Reserved | |||||||||
| 0x0F68 | I2C3MSK | 15:8 | MSK[9:8] | |||||||
| 7:0 | MSK[7:0] | |||||||||