21.1.3 Period Register 1

Name:	PR1
Offset:	0x108


Bit	15	14	13	12	11	10	9	8
	PR[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	PR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 15:0 – PR[15:0] Period Register bits

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.