21.1 Timer1 Control Register


Offset	Name	Bit Pos.	7	5	4	3	2	1
0x00 ... 0xFF	Reserved
0x0100	T1CON	15:8	TON	SIDL	TMWDIS	TMWIP	PRWIP	TECS[1:0]
0x0100	T1CON	7:0	TGATE	TCKPS[1:0]			TSYNC	TCS
0x0102 ... 0x0103	Reserved
0x0104	TMR1	15:8	TMR[15:8]
0x0104	TMR1	7:0	TMR[7:0]
0x0106 ... 0x0107	Reserved
0x0108	PR1	15:8	PR[15:8]
0x0108	PR1	7:0	PR[7:0]

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.