46.21 SERCOM SPIx Mode Electrical Specifications

Figure 46-7. SPIx Host Module CPHA = 0 Timing Diagrams

Figure 46-8. SPIx Host Module CPHA = 1 Timing Diagrams

Table 46-27. SERCOM SPIx Module Host Mode Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾	Min.	Typ.	Max.	Units	Conditions
MSP_1	FSCK	SCK Frequency	—	—	14.56	MHz	Transmitter mode, CTRLB.RXEN = 0, C_LOAD=30 pF(max)
			—	—	3.41		Full Duplex Transmit and Receive mode, C_LOAD=30 pF(max) Loop-Back mode with one SPI talking to another SPI on the same MCU.
			—	—	1/(2*(TMIS+NOTE2_TV)) ⁽²⁾		Full Duplex Transmit and Receive mode, C_LOAD=30 pF(max). The maximum SPI speed of the MCU is partially dependent on the external SPI device performance characteristics. Faster speeds than the Loop-Back mode above may therefore be possible using the formula.
MSP_3	TSCL	SCK Output Low Time	1/(2*FSCK)	—	—	ns	—
MSP_5	TSCH	SCK Output High Time	1/(2*FSCK)	—	—	ns	—
MSP_7	TSCF	SCK and MOSI Output Fall Time	—	—	DI_27	ns	DI_27: Refer to I/O Pin Electrical Specification
MSP_9	TSCR	SCK and MOSI Output Rise Time	—	—	DI_25	ns	DI_25: Refer to I/O Pin Electrical Specification
MSP_11	TMOV	MOSI Data Output Valid after SCK	—	—	34.33	ns	VDDIO = 2.7V, C_LOAD = 30 pF(max)
MSP_13	TMOH	MOSI hold after SCK	8.72	—	—	ns
MSP_15	TMIS	MISO Setup Time of Data Input to SCK	72.96	—	—	ns
MSP_17	TMIH	MISO Hold Time of Data Input to SCK	12.99	—	—	ns
MSP_19	SPI_GCLK	SERCOM SPI input clk freq, GCLK_SERCOMx_CORE	—	—	FCLK_23	MHz	—

Note:

Assumes VDDIO = 2.7V and 30 pF external load on all SPIx pins unless otherwise noted.
NOTE2_TV is the client external device data output valid time from clock edge specification.

Figure 46-9. SPIx Client Module CPHA = 0 Timing Diagram

Figure 46-10. SPIx Client Module CPHA = 1 Timing Diagram

Table 46-28. SERCOM SPIx Module Client Mode Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated) Operating temperature -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾	Min.	Typ.	Max.	Units	Conditions
SSP_1	FSCK	SCK Frequency	—	—	14.56	MHz	Receiver mode, C_LOAD = 30 pF_(max)
			—	—	3.41		Full Duplex Transmit and Receive mode, C_LOAD = 30 pF_(max) Loop- Back mode with one SPI talking to another SPI on the same MCU.
			—	—	1/(2*(TSOV+NOTE2_TMIS))⁽²⁾		Full Duplex Transmit and Receive mode, C_LOAD = 30 pF(max). The maximum SPI speed of the MCU is partially dependent on the external SPI device performance characteristics. Faster speed than the Loop-Back mode above may therefore be possible using the formula.
SSP_3	TSCL	SCK Output Low Time	1/(2*FSCK)	—	—	ns	—
SSP_5	TSCH	SCK Output High Time	1/(2*FSCK)	—	—	ns	—
SSP_7	TSCF	SCK and MISO Output Fall Time	—	—	DI_27	ns	DI_27: Refer to I/O Pin Electrical Specification
SSP_9	TSCR	SCK and MISO Output Rise Time	—	—	DI_25	ns	DI_25: Refer to I/O Pin Electrical Specification
SSP_11	TSOV	MISO Data Output Valid after SCK	—	—	77.5	ns	VDDIO = 2.7V, C_LOAD = 30 pF_(max)
SSP_13	TSOH	MISO hold after SCK	21.07	—	—	ns
SSP_15	TSIS	MOSI Setup Time of Data Input to SCK	15.67	—	—	ns
SSP_17	TSIH	MOSI Hold Time of Data Input to SCK	10.36	—	—	ns
SSP_19	TSSS	SS setup to SCK (PRELOADEN = 1)	2*tck_APB + 27.6	—	—	ns
SSP_19	TSSS	SS setup to SCK (PRELOADEN = 0)	27.6	—	—	ns
SSP_21	TSSH	SS hold after SCK Client	8.59	—	—	ns
SSP_23	SPI_GCLK	SERCOM SPI input clk freq, GCLK_SERCOMx_CORE	—	—	FCLK_23	MHz	—

Note:

Assumes VDDIO = 2.7V and 30 pF external load on all SPIx pins unless otherwise noted.
NOTE2_TMIS is the host external device setup time.