46.17 DAC Electrical Specifications
| AC CHARACTERISTICS | Standard
Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial | |||||||
|---|---|---|---|---|---|---|---|---|
| Param. No. | Symbol | Characteristics | Min. | Typ. | Max. | Units | Conditions | |
| DAC_1 | DRES | DAC Resolution | — | — | 10 | Bits | — | |
| DAC_3 | DCLK | Internal DAC Clock Frequency (fGCLK_DAC) | — | — | FCLK_53 | MHz | — | |
| DAC_5 | DSAMP | DAC Sampling Rate | — | — | 350 | ksps | +/-4LSB of final value for step size ≤100 Lsb @ CLOAD and RLOAD w/AVDD = 5.0V | |
| DAC_7 | VOUT | Output Voltage Range | AVSS+0.05 | — | AVDD-0.05 | V | Ext Pin (buffered) VREFA = AVDD @ CLOAD and RLOAD | |
| AVSS+0.05 | — | VREF | V | Ext Pin (buffered) @ CLOAD and RLOAD (VREFA < (AVDD-50 mv)) | ||||
| AVSS | — | VREF | V | Internal connection to another module (e.g. AC) (No buffer) | ||||
| DAC_9 | VREF (1,2,3) | DAC Reference Input Option | AVDD CTRLB.REFSEL = 0x1 | AVDD | V | — | ||
| VREFA pin CTRLB.REFSEL = 0x2 | 2.4V | — | AVDD - 0.6V | V | — | |||
| INTREF CTRLB.REFSEL = 0x0 | 2.4V | VR_1 | AVDD - 0.6V | V | See parameter VR_1 | |||
| DAC_11 | CLOAD | DAC Out maximum load to meet VOUT | — | — | 100 | pF | — | |
| DAC_13 | RLOAD | DAC Out maximum load to meet VOUT | 5 | — | — | kΩ | — | |
| SINGLE-ENDED MODE (1,2,3,4) | ||||||||
| SDAC_19 | INL(5) | Integral Non Linearity | -1.2 | — | 1.2 | LSB | CTRLB.REFSEL = 0x1 VREF = AVDD = 5.0V w/ CLOAD and RLOAD | |
| -1.2 | — | 1.2 |
CTRLB.REFSEL = 0x2 AVDD = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD and RLOAD | |||||
| SDAC_21 | DNL(5) | Differential Non Linearity | -1.4 | — | 1.4 | LSB | CTRLB.REFSEL = 0x1 VREF = AVDD = 5.0V w/ CLOAD and RLOAD | |
| -1.5 | — | 1.5 | LSB | CTRLB.REFSEL = 0x2 AVDD = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD and RLOAD | ||||
| SDAC_23 | GERR (5) | Gain Error | -5.4 | — | 5.4 | %FS | CTRLB.REFSEL = 0x1 VREF = AVDD = 5.0V w/ CLOAD and RLOAD | |
| -7.2 | — | 7.2 | %FS |
CTRLB.REFSEL = 0x2 AVDD = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD and RLOAD | ||||
| SDAC_25 | EOFF (5) | Offset Error | -3.4 | — | 3.4 | mV | CTRLB.REFSEL = 0x1 VREF = AVDD = 5.0V w/ CLOAD and RLOAD | |
| -6.4 | — | 6.4 | mV | CTRLB.REFSEL = 0x2 AVDD = 5.0V VREF = VREFA pin = 3.0V w/ CLOAD and RLOAD | ||||
- DAC Internal Bandgap Reference voltage 4.096V when used.
- DAC reference voltages < 2.4V is not practical and peripheral performance is not guaranteed.
- DAC functional device operation with either internal or external VREF<2.4V is guaranteed, but not characterized. DAC will function but with degraded performance. DAC accuracy is limited by users application noise or accuracy on AVDD, AVSS, and VREF accuracy or drift.
- 10 bit mode.
- Over VOUT range defined by DAC_7 parameter.