11.1.8 Buffer Status Register

Name: OA_BUFSTS
Address: 0x000B

Internal SPI<->MAC Transmit and Receive Buffer Status

Bit 3130292827262524 
  
Access RORORORORORORORO 
Reset 00000000 
Bit 2322212019181716 
  
Access RORORORORORORORO 
Reset 00000000 
Bit 15141312111098 
 TXC[7:0] 
Access RORORORORORORORO 
Reset 00110000 
Bit 76543210 
 RBA[7:0] 
Access RORORORORORORORO 
Reset 00000000 

Bits 15:8 – TXC[7:0] Transmit Credits Available

This field contains the number of Ethernet frame segments that the host MCU can write in a single burst without causing a Transmit Buffer Overflow Error.
Note: This field is saturated to five bits (0x1F) and sent over SPI to the host MCU within the TXC field of every receive data footer.
ValueDescription
≥0x31Not supported
0x30The host MCU may write up to 48 segments of Ethernet frame data without overflow.
0x2FThe host MCU may write up to 47 segments of Ethernet frame data without overflow.
......
0x01The host MCU may write 1 segments of Ethernet frame data without overflow.
0x00The host MCU cannot write any segments of Ethernet frame data without causing an overflow error .

Bits 7:0 – RBA[7:0] Receive Blocks Available

This field contains the number of receive data blocks (segments) of Ethernet frame data that is available to the host MCU for reading. If the MCU host reads more data blocks than is available, either empty data blocks with the footer Data Valid flag set to zero or additional frame data may be sent to the host if the MAC-PHY has received data from the network since the beginning of the frame data transaction burst.
Note: This field is saturated to five bits (0x1F) and sent over SPI to the host within the RBA field of every receive data footer.
ValueDescription
≥0x31Not supported
0x30At least 48 blocks of Ethernet frame data are available for reading.
0x2F47 blocks of Ethernet frame data are available for reading.
......
0x01One block of Ethernet frame data is available for reading.
0x00There is no Ethernet frame data available for reading.