11.2.27 Statistics 1
Name: | STATS1 |
Address: | 0x0209 |
Reset: | 0x00000000 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
RXRER[7:0] | |||||||||
Access | RC | RC | RC | RC | RC | RC | RC | RC | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
RXBOVR[7:0] | |||||||||
Access | RC | RC | RC | RC | RC | RC | RC | RC | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
RXFOVR[7:0] | |||||||||
Access | RC | RC | RC | RC | RC | RC | RC | RC | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | RC | RC | RC | RC | RC | RC | RC | RC | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 31:24 – RXRER[7:0] Receive Resource Errors
This bit field counts frames that were not received from the network because there was no internal memory resource available at the beginning of frame reception. The receive frame is ignored.
This field will saturate at 0xFF and will be cleared on read.
Bits 23:16 – RXBOVR[7:0] Receive Buffer Overruns
This bit field counts the number of frames that are address recognized but dropped due to a receive buffer overrun during the middle of frame reception.
This field will saturate at 0xFF and will be cleared on read.
Bits 15:8 – RXFOVR[7:0] Receive FIFO Overruns
This bit field counts the number of frames that are address recognized but dropped due to a receive FIFO overrun during the middle of frame reception.
This field will saturate at 0xFF and will be cleared on read.