36.7.1 Control A
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CTRLA |
| Offset: | 0x000 |
| Reset: | 0x00 |
| Property: | RW |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| MODE | RUNSTDBY | ENABLE | SWRST | ||||||
| Access | RW | RW | RW | RW | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 7 – MODE Operating Mode
| Value | Name | Description |
|---|---|---|
| 0 | DEVICE | Device Mode |
| 1 | HOST | Host Mode |