32.8.64 GMAC Frames Received Register

Table 32-79. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: FR
Offset: 0x1158
Reset: 0x00000000
Property: Read-only(Cleared on Read)

Bit 3130292827262524 
 FRX[31:24] 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 FRX[23:16] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 FRX[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 FRX[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 31:0 – FRX[31:0] Frames Received without Error

This bit field counts the number of frames successfully received, excluding pause frames. It is only incremented if the frame is successfully filtered and copied to memory.