32.8.66 GMAC Multicast Frames Received Register

Table 32-81. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: MFR
Offset: 0x1160
Reset: 0x00000000
Property: Read-only(Cleared on Read)

Bit 3130292827262524 
 MFRX[31:24] 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 MFRX[23:16] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 MFRX[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 MFRX[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 31:0 – MFRX[31:0] Multicast Frames Received without Error

This register counts the number of multicast frames successfully received without error, excluding pause frames, and is only incremented if the frame is successfully filtered and copied to memory.