8.2.1 I/O Port Write/Read Timing

One instruction cycle is required between a port direction change or port write operation and a read operation of the same port. Typically, this instruction would be a NOP.

The following registers are in the PORT module:

  • ANSELx (one per port)
  • TRISx (one per port)
  • PORTx (one per port)
  • LATx (one per port)
  • ODCx (one per port)
  • CNPUx (one per port)
  • CNPDx (one per port)
  • CNCONx (one per port – optional)
  • CNEN0x (one per port)
  • CNSTATx (one per port – optional)
  • CNEN1x (one per port)
  • CNFx (one per port)