20.4.1.1 Legacy Mode

In Legacy mode, the clock source is divided down to the desired baud clock using integer division. Legacy mode is selected when CLKMOD = 0 (UxCON[27]). A selectable prescaler is present to support a wide range of baud rates and is controlled by the BRGS bit (UxCON[7]). Up to a 20-bit value of BRG (UxBRG[19:0]) is used to further divide down the input clock to the final baud rate.

Equation 20-1 and Equation 20-2 show formulas for baud rate and BRG value given by the BRGS for all protocol modes.

Equation 20-1. Baud Rate When BRGS = 0, CLKMOD = 0
Note: FUART = UART Clock Frequency.
Equation 20-2. Baud Rate When BRGS = 1, CLKMOD = 0
Note: BRG values should be three or more for proper smart card communication.

The UART fixed division baud rate setup procedure:

  1. Select the clock input source with the CLKSEL[1:0] bits.
  2. Clear the CLKMOD bit.
  3. Select the clock prescaler by writing a value to BRGS.
  4. Using Equation 20-1 or Equation 20-2, calculate the value for BRG and write to the UxBRG register.
  5. Set the ON bit.