20.4.1 Clocking and Baud Rate Configuration

The UART supports multiple clock sources and two types of Baud Rate Generation (BRG). One of the clock sources provided is selected by the CLKSEL[1:0] bits (UxCON[26:25]). Clock source selection and prescaler can only be changed when the ON bit (UxCON[15]) is cleared. The baud clock can be generated with one of the following methods:

• Legacy mode, fixed division
• Fractional Division mode

To allow synchronized time of clock domains, do not make write-to-back to the UxBRG register. UxBRG should be written only when ON = 0 to avoid corruption of an ongoing transmission or reception. A block diagram of the UART clocking is shown in Figure 20-3.