21.3.5 SPIx Baud Rate Generator Register

Note:

Changing the BRG value when SPIEN = 1 causes undefined behavior.

Legend: R = Readable bit; W = Writable bit

Name:	SPIxBRG
Offset:	0x1810, 0x1830, 0x1850, 0x1870


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
				SPIxBRG[12:8]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	SPIxBRG[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 12:0 – SPIxBRG[12:0] SPI Baud Rate Generator Divisor bits⁽¹⁾

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21.3.5 SPIx Baud Rate Generator Register

Bits 12:0 – SPIxBRG[12:0] SPI Baud Rate Generator Divisor bits(1)

Bits 12:0 – SPIxBRG[12:0] SPI Baud Rate Generator Divisor bits⁽¹⁾