26.5.4.2.1 CCPxRA = CCPxRB

If CCPxRA and CCPxRB have the same value, the output is initialized low and stays low; no pulses are generated and no output compare interrupt is generated (Figure 26-27). To put another way, the PWM duty cycle is 0. The Reset/clear-on-CCPxRB match logic overrides the set-on-CCPxRA match logic for a net result of no change in the Output state.

Figure 26-27. Timing for Dual Edge Compare (CCPxRA = CCPxRB)