15.5.1.3 Six-Step Commutation – PWM Scheme 3

Six-Step PWM Scheme 3 Code

//For delay function
#define FCY 8000000 //CPU frequency in Hz
#include "libpic30.h"

#include <xc.h>
#include <stdint.h>

uint32_t state = 0;
uint32_t PWMState1[6] = {0x0000000C,0x0000000C,0x0000000C,0x0000080C,0x0000080C,0x0000080C};
uint32_t PWMState2[6] = {0x00000000,0x00000000,0x00300000,0x00000000,0x00000000,0x00300000};
uint32_t PWMState3[6] = {0x0000080C,0x0000080C,0x0000000C,0x0000000C,0x0000000C,0x0000080C};
uint32_t PWMState4[6] = {0x00000000,0x00300000,0x00000000,0x00000000,0x00300000,0x00000000};
uint32_t PWMState5[6] = {0x0000000C,0x0000080C,0x0000080C,0x0000080C,0x0000000C,0x0000000C};
uint32_t PWMState6[6] = {0x00300000,0x00000000,0x00000000,0x00300000,0x00000000,0x00000000};

void PWMInitialization(void);

int main(void) 
{
    PWMInitialization();  
    
    /* To Update Duty cycle values to PG1-PG3, add two lines of code written
    below (In this example, setting 50% Duty Cycle):
    After writing the MDC register, set the Update request bit PG1STATbits.UPDREQ.
    This will transfer the MDC value to all the PWM generators PG1-PG3.
    Note that the Update Mode (UPDMOD) of PG2, PG3 is Client EOC and
    PG1 MSTEN bits is '1' */
	
    PG1STATbits.UPDREQ = 1;
    
    while (1)
    {
        for (state=0; state<6;state++)
        {
            /* Delay is used to simulate BLDC commutation; In practical
            application, commutation state transition will be based on feedback from Motor */
            __delay_us(200);

            PG1IOCON1 = PWMState1[state];
            PG1IOCON2 = PWMState2[state];
            
            PG2IOCON1 = PWMState3[state];
            PG2IOCON2 = PWMState4[state];
            
            PG3IOCON1 = PWMState5[state];
            PG3IOCON2 = PWMState6[state];
        }
    }
}


void PWMInitialization(void)
{

    PCLKCON      = 0x0000;    
    
    //Set PWM master clock to 400MHz from PLL2 through CLKGEN5
    configure_PLL2_Fout_400MHz();
    clock_PWM_from_PLL2_Fout();
    
    /* PWM Clock Divider Selection bits
       0b11 = 1:16 ; 0b10 = 1:8 ;0b01 = 1:4 ; 0b00 = 1:2 */
    PCLKCONbits.DIVSEL = 0;
    /* PWM Master Clock Selection bits
       0b01 = CLKGEN5 ; 0b00 = UPB clock */
    PCLKCONbits.MCLKSEL = 1;
    /* Lock bit: 0 = Write-protected registers and bits are unlocked */
    PCLKCONbits.LOCK = 0;

    /* Initialize Master Period Register */
    MPER         = 40000;
    /* Initialize Master Duty Cycle */
    MDC          = 20000;
    
    /* Initialize PG1CON Registers */
    PG1CON = 0x00000000;
    
    /*PWM Generator uses the master clock selected by the MCLKSEL[1:0] 
     * (PCLKCON[1:0] control bits */
    PG1CONbits.CLKSEL = 1;
    /* Select PWM Generator duty cycle register as MDC */  
    PG1CONbits.MDCSEL  = 1;
    /* Select PWM Generator period register as MPER */
    PG1CONbits.MPERSEL = 1;
    /* PWM Generator broadcasts software set of UPDREQ control bit and EOC signal 
     * to other PWM Generators. */
    PG1CONbits.MSTEN = 1;
    /* Start of cycle is local EOC */
    PG1CONbits.SOCS = 0b0000;
    /* PWM Generator operates in Center-Aligned PWM mode*/
    PG1CONbits.MODSEL = 4;

    /* Initialize PG1IOCON Registers */
    PG1IOCON1 = 0x00000000;

    /* PWM Generator Output Mode is Complementary Mode */
    PG1IOCON1bits.PMOD = 0;
    /* PWM Generator controls the PWMxH output pin */
    PG1IOCON1bits.PENH = 1;
    /* PWM Generator controls the PWMxL output pin */
    PG1IOCON1bits.PENL = 1;

    PG1EVT1   = 0x00000000;
    /* A write of the PGxDC register automatically sets the UPDREQ bit */
    PG1EVT1bits.UPDTRG = 0;
    /* PWM generator trigger output is EOC*/
    PG1EVT1bits.PGTRGSEL = 0;

    /* Initialize PG2CON Registers */
    PG2CON = 0x00000000;
    
    /*PWM Generator uses the master clock selected by the MCLKSEL[1:0] 
     * (PCLKCON[1:0] control bits */
    PG2CONbits.CLKSEL = 1;
    /* Select PWM Generator Duty Cycle Register as MDC */
    PG2CONbits.MDCSEL = 1;
    /* Select PWM Generator Period Register as MPER */
    PG2CONbits.MPERSEL = 1;
    /* Start of Cycle is PG1 trigger output selected by 
     * PG1EVTbits.PGTRGSEL<2:0> bits */
    PG2CONbits.SOCS = 0b0001;
    /* PWM Generator operates in Center-Aligned PWM mode*/
    PG2CONbits.MODSEL = 4;
    
    /* Initialize PG2IOCON Registers */
    PG2IOCON1 = 0x00000000;
    /* PWM Generator Output Mode is Complementary Mode */
    PG2IOCON1bits.PMOD = 0;
    /* PWM Generator controls the PWMxH output pin */
    PG2IOCON1bits.PENH = 1;
    /* PWM Generator controls the PWMxL output pin */
    PG2IOCON1bits.PENL = 1;

    /* Initialize PG3CON Registers */
    PG3CON = 0x00000000;
    
    /*PWM Generator uses the master clock selected by the MCLKSEL[1:0] 
     * (PCLKCON[1:0] control bits */
    PG3CONbits.CLKSEL = 1;
    /* Select PWM Generator Duty Cycle Register as MDC */
    PG3CONbits.MDCSEL = 1;
    /* Select PWM Generator Period Register as MPER */
    PG3CONbits.MPERSEL = 1;
    /* Start of Cycle is PG1 trigger output selected by 
     * PG1EVTbits.PGTRGSEL<2:0> bits */
    PG3CONbits.SOCS = 0b0001;
    /* PWM Generator operates in Center-Aligned PWM mode*/
    PG3CONbits.MODSEL = 4;
    
    /* Initialize PG3IOCON Registers */
    PG3IOCON1 = 0x00000000;
    /* PWM Generator Output Mode is Complementary Mode */
    PG3IOCON1bits.PMOD = 0;
    /* PWM Generator controls the PWMxH output pin */
    PG3IOCON1bits.PENH = 1;
    /* PWM Generator controls the PWMxL output pin */
    PG3IOCON1bits.PENL = 1;
    
	/* Initialize PWM GENERATOR 3 DEAD-TIME REGISTER */
	PG3DT = 0x06400640;    
    /* Initialize PWM GENERATOR 2 DEAD-TIME REGISTER */
	PG2DT = 0x06400640;
    /* Initialize PWM GENERATOR 1 DEAD-TIME REGISTER */
	PG1DT = 0x06400640;
 
    /* Enable PWM generator 3 */
	PG3CONbits.ON =1;     
    /* Enable PWM generator 2 */
	PG2CONbits.ON =1; 
    /* Enable PWM generator 1, starting all PWM generators together */
	PG1CONbits.ON =1;    
}