8.6.2.1 Crypto Accelerator Enable Register

Legend: W = Writable bit, R = Readable bit

Note:
  1. If CAMON = 0, only the CAMCON register can be accessed. An attempt to access other internal module registers generates a bus error trap.
  2. If CAMSIDL = 1 and in Idle mode, only the CAMCON register can be accessed.
Name: CAMCON
Offset: 0x7A8000

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 CAMON CAMSIDLE      
Access R/WR/W 
Reset 00 
Bit 76543210 
          
Access  
Reset  

Bit 15 – CAMON  Module Enable bit(1)

ValueDescription
1 Module enabled
0 Module disabled

Bit 13 – CAMSIDLE  Stop in Idle(2) bit

ValueDescription
1 Module stops the operation in Idle mode.
0 Module continues the operation in Idle mode.