5.3.15 PWB ECC RAM Error Data Register

Table 5-16. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: PWBXECCEDATA, PWBYECCEDATA
Offset: 0x35B4, 0x35F4

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 DATA[23:16] 
Access R/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HC 
Reset 00000000 
Bit 15141312111098 
 DATA[15:8] 
Access R/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HC 
Reset 00000000 
Bit 76543210 
 DATA[7:0] 
Access R/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HCR/HS/HC 
Reset 00000000 

Bits 23:0 – DATA[23:0] RAM Read Error Data bits

These bits represent the value stored in the faulty memory location when Single or Double-bit ECC errors occur.