23.1.1 MSS to the FPGA Fabric Interface

The FIC interface can be configured towards the fabric to support AHB-Lite or APB. The FIC configuration allows you to implement AHB-Lite or APB slave user logic in the fabric that can expose the memory map of the Cortex-M3 processor and other masters on the AHB bus matrix. You can also implement an AHB-Lite or APB master in the fabric that can access any slave on the AHB bus matrix. Since FIC_0 and FIC_1 have an AMBA interface towards the fabric, user logic should implement the AMBA AHB-Lite or APB3 protocol in order to communicate with the FIC.

The following options are available for implementing peripherals in the fabric:

• If you are using a mix of AHB-Lite and APB peripherals, use CoreAHBLite, CoreAHB2APB3, and CoreAPB3 soft IPs.
• If you are using APB (APB v3.0) peripherals (for example, CoreUARTAPB), use CoreAPB3 soft IP for connecting to the fabric.
• If you are using AHB-Lite peripherals, use CoreAHBLite soft IP for connecting to the fabric interface.